File:Riedel-research-maximizing-memory-level-parallelism-via-integrated-stochastic-logic-in-m-7b13df82.jpg

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Riedel-research-maximizing-memory-level-parallelism-via-integrated-stochastic-logic-in-m-7b13df82.jpg ‎(554 × 538 pixels, file size: 46 KB, MIME type: image/jpeg)

Source

Figure excerpted from Maximizing Memory-Level Parallelism via Integrated Stochastic Logic-in-Memory Architectures. Marc Riedel is an author of the paper.

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current23:55, 18 August 2026Thumbnail for version as of 23:55, 18 August 2026554 × 538 (46 KB)MarcRiedel (talk | contribs)Add visual for the redesigned research publications page

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