John Backes

About John

My research interests include logic synthesis, formal verification, technology mapping, and SAT-based algorithms.

Journal Papers

title:	The Synthesis of Cyclic Dependencies with Boolean Satisfiability
authors:	John Backes, and Marc Riedel
submitted to:	ACM Transactions on Design Automation of Electronic Systems, 2011.

title:	The Analysis and Mapping of Cyclic Circuits with Boolean Satisfiability
authors:	John Backes, Brian Fett and Marc Riedel
submitted to:	IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2010.

title:	The Synthesis of Stochastic Circuits for Nanoscale Computation
authors:	Weikang Qian, John Backes, and Marc Riedel
presented at:	International Journal of Nanotechnology and Molecular Computation, 2010.

Conference Papers

title:	Resolution Proofs as a Data Structure For Logic Synthesis
authors:	John Backes and Marc Riedel
presented at:	The International Workshop on Logic and Synthesis, San Diego, CA, 2011.

title:	Reduction of Interpolants For Logic Synthesis
authors:	John Backes and Marc Riedel
presented at:	The International Conference on Computer-Aided Design, San Jose, CA, 2010.

title:	The Synthesis of Cyclic Dependencies with Craig Interpolation
authors:	John Backes and Marc Riedel
presented at:	The International Workshop on Logic and Synthesis, Berkeley, CA, 2009.

title:	The Analysis of Cyclic Circuits with Boolean Satisfiability
authors:	John Backes, Brian Fett and Marc Riedel
presented at:	The International Conference on Computer-Aided Design, San Jose, CA, 2008.