Difference between revisions of "Main Page"

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* See our "[[People]]" page for a list of everyone in the group.  
* See our "[[People]]" page for a list of everyone in the group.  
* See our "[[Research]]" page for an overview of our research activities.
* See our "[[Research]]" page for an overview of our research activities.
* See our "[[Papers,_Theses,_Presentations,_Publications,_and_Patents]]" page for our papers, presentations, theses, and funding proposals.
* See our "[[Papers,_Presentations,_Theses,_Proposals,_and_Patents]]" page for our papers, presentations, theses, and funding proposals.


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[[Image:website-art-1.gif|center|600px]]

Revision as of 07:31, 21 October 2023


A collaborative website for Prof. Marc Riedel's research group at the University of Minnesota.

About the Group

The group consists of Prof. Marc Riedel and his students in the Department of Electrical and Computer Engineering at the University of Minnesota. Our research activities encompass topics in logic synthesis and verification, as well as in synthetic and computational biology. A broad theme is the application of expertise from digital circuit design to new areas.

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Announcements


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